by following the online tutorial from Altera, My first FPGA Design tutorial,
I added some adjustments to my Mars-EDA-s board
The Quartus II that I am using is version 11.0
p19, adding symbol
13. from icons bar, click "logic gate" symbol
14. in Symbol window, click Project directory to expand it
15. select newly created simple_counter by clicking it's icon
P22, speed setting
As the FPGA in use is EP1C3T144C8N, using below part number description as an example,
speed grade is 8
the crystal oscillator on board is 40 MHz
p24
p27:
clock division cycle : 2 >> actual settings 20MHz
p41, before doing "start Analysis & Elaboration", make sure the settings is as below
From menu bar, Assignments >> Settings >> Top-level entity: my_first_fpga_top
Analysis & Elaboration ok:
now you can proceed to Pins Planner
The Node Name <> locations are as follows
button[0] P105
led [3] P77
led [2] P79
led [1] P85
led [0] P83
osc_clk P16
P45
If everything is doing properly,
compile is successful
Joel's
I added some adjustments to my Mars-EDA-s board
The Quartus II that I am using is version 11.0
P11
Project Wizard:p19, adding symbol
13. from icons bar, click "logic gate" symbol
14. in Symbol window, click Project directory to expand it
15. select newly created simple_counter by clicking it's icon
As the FPGA in use is EP1C3T144C8N, using below part number description as an example,
speed grade is 8
the crystal oscillator on board is 40 MHz
p24
p27:
clock division cycle : 2 >> actual settings 20MHz
p41, before doing "start Analysis & Elaboration", make sure the settings is as below
From menu bar, Assignments >> Settings >> Top-level entity: my_first_fpga_top
Analysis & Elaboration ok:
now you can proceed to Pins Planner
The Node Name <> locations are as follows
button[0] P105
led [3] P77
led [2] P79
led [1] P85
led [0] P83
osc_clk P16
P45
If everything is doing properly,
compile is successful
Joel's
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