Zynq-7000 is the most integrated low cost one-chip-for-all solution at this moment, it can be used for interfacing with camera sensors. however, from Igor Gorokhov of Aldec: Although the Zynq-7000 devices are not fully electrically compatible with the MIPI D-PHY physical protocol used for CSI-2, those data lines can be accessed by Zynq using the LVDS I/O standard running in HS mode. Adam Taylor's blog , on using Micro Zed board: When we implement a MIPI CSI-2 solution in our FPGA, we will most often be using a D-PHY based solution. Even if a IP core is used for the higher levels of the protocol, the D-PHY is normally configured by the developer as that is where the line rate, clocking and pin out are defined. This D-PHY block is then connected to the MIPI IP Core. Depending upon if we are implementing the MIPI solution in a Zynq (or seven series FPGA) or a Zynq MPSoC (UltraScale+ FPGA), the physical elements of the D-PHY will be different. T